******* DMC8 Project File *******
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FVR 2
DMC 1
ROM 0
RAM 0
POH 7
POG 6
POF 5
POE 4
POD 3
POC 2
POB 1
POA 0
PIH 7
PIG 6
PIF 5
PIE 4
PID 3
PIC 2
PIB 1
PIA 0
******* DMC8 Project File *******
;---
CNTRL	EQU	00h	; IA input port (UD control line, bit 0)
STATE	EQU	00h	; OA output port (the counter output)
;---
	ORG	0000h	; link to the reset
	JP	0100h	
	ORG	0100h	
;---
INIT:	LD	A,00h	; initialize the counter state
	OUT	(STATE),A	; and the outputs to zero
	LD	B,A	
;
MAIN:	IN	A,(CNTRL)	; read the input port CNTRL
	BIT	0,A	; check the value of input line UD
	JP	NZ,DN	; jump and decrement the state if it is at '1'
UP:	INC	B	; otherwise, increment the state
	JP	UPDATE	; jump to update and display it
DN:	DEC	B	; decrement the state
;
UPDATE:	LD	A,B	; mask the bits in position 7,6,5 and 4
	AND	0Fh	; to reduce the count to 4 bits
	LD	B,A	; update the state in B
	OUT	(STATE),A	; and copy it to the output lines
	JP	MAIN	
