Counters and other sequential networks

Giuliano Donzellini, Domenico Ponta

Analysis (paper and pencil) and Simulation of a Sequential Network (2)

035402

 

v1.71

Perform (paper and pencil) a timing analysis of the sequential network in the figure below (download and print the PDF template page). The page contains the network's schematics and two different input sequences, as in the following figures.

Timing Sequence (A):

Timing Sequence (B):

Check your solutions with a timing simulation , by opening the network , to be completed, in the d-DcS. In the timing diagram window you'll find available the two sequences A and B. Note: since the simulation allow the self-check of the results, a report is not requested.