Load the following combinational network in the d-DcS, with a click on the figure:
The network is the well-known two-input multiplexer. Measure, using the timing simulation , the (simulated) propagation time between the signal Sel and the output Out, and compile a table as this (the first column shows the transitions of the input Sel):
A suitable test sequence is available in the Timing Diagram window. To make easier the time measurement, in this window two useful commands are available:
Now verify that, when In1 and In2 are at level 'High', one of the transitions of the Sel input produces a hazard on the output signal Out. Measure the time duration of the hazard, analysing its behaviour with a timing simulation displayed in a proper time scale.
Using the method of covering one-to-one transitions, modify the circuit, eliminating the hazard. Draw the schematic of the modified circuit and verify the actual elimination of the hazard with a timing simulation (using the same test sequence and the same time scale, as before). Click on the next figure to open in the d-DcS the schematic to be completed: