Version Notes

(Current Version - 2.11.400 - June 5, 2018)


Deeds-DcS (editor) Deeds-DcS (fpga) Deeds-DcS (simulation) Deeds-DcS (timing) Deeds-McE Deeds-FsM All

   Deeds-DcS (Editor)   

 File Version

The internal file format of the ".pbs" and ".cbe" files has changed (now: "1.031"). The change was necessary because of the addition of new components. Pay attention that the old files are readable by the new Deeds version, while files created by the current version are not compatible with the older ones.

 Properties Dialogs

Starting from the present version, a "Save a Copy" button appears in the "Properties" dialog of the FSM, CBE and DMC8 components.

This button allows to save a copy of the original file (".fsm", ".cbe" or ".mc8") that was used when the component was inserted in the circuit. When the button is pressed, a "Save As" dialog is opened, with the file name set to the original name, plus the prefix "MyCopyOf_".

 New Bus Multiplexers

Added to the component library the Bus Multiplexers 8 to 1 channel, in the 4, 8 and 16-bit versions. In the following figure all the available sizes in the 16-bit version (2 to 1, 4 to 1 and 8 to 1 channel).

 Drawing Wires & Buses

Now, when drawing a new wire (or bus) segment, a pair of crossed lines is displayed, as large as the drawing sheet area, which allows to better match the position of the wires with respect to the target to connect (especially when it is far away).

The cross lines are displayed in a pale red, visible also when the drawing grid is active. The following menu item allows to activate, or not, the display of the cross (the design mode of the previous versions did not include this cross, so it can be disabled). The shortcut for the command is <CTRL> + "L".

Moreover, now, when inserting a wire (or a bus), the "Escape" key behaves in a manner equivalent to clicking of the right mouse button. If the right mouse button is released, or we press the "Escape" key one time, the wire (or bus) that we are inserting is terminated, and we return to the state of insertion of the first vertex of a wire (or bus).

That is, without exiting the command, we are able to insert immediately a new wire (or bus), without returning to the menu to activate again the command, as in the previous versions. Pressing a second time the "Escape" key we exit the command.

 ROM Programming Dialog

In the ROM Programming dialog, the possibility to choose the format of the data saved from the ROM has been added, and in particular now it is possible to generate the VHDL code of the ROM, including the stored data. It is possible to generate, as before, the ".drs" files ("Deeds Rom Source"); now the user can select the format of data (that can be saved in binary, in decimal and in hexadecimal code).

The dialog appears as before (see the figure above), but by pressing the "Save" button the file is not saved immediately. Instead, the dialog changes appearance (see below), where a preview of the generated code is shown.

In this mode it is possible to change the generation options:

File Format:

  • Deeds Rom Source (".drs")
  • VHDL (".vhd")

Parameters (apply only to ".drs" files):

  • Binary ('Bin')
  • Hexadecimal ('Hex')
  • Decimal ('Dec')

It is not possible to export the contents of the ROM in ASCII text mode, but it is always possible, as before, to load an ASCII text into the ROM.

When the "Export" button is clicked, the "Save As" dialog opens. When the user press "OK" the file is saved and the dialog returns to the normal mode. We can return in normal mode also by clicking the "Cancel" button or pressing the "Escape" key. Then, by clicking agian on "Cancel" (or pressing the "Escape" key) you can exit the dialog without saving any changes made to the contents of the ROM.

For details about the new functionality, click here.

 Default Path

Now the default path is always "My Documents", for all the file types. After a file is read or written elsewhere, the path string is saved and the path is reused on next time. The paths are saved separately, according to the file type and the different circumstances:

  • For circuit files, when opened in the editor [".pbs", ".cbe"];
  • For image files, when saved from circuit editor or timing diagram [".bmp", ".png"];
  • For Fsm and Cbe files, when loaded as components into the circuit [".fsm", ".cbe"];
  • For ROM programming files [".drs"].

 Input Dip-Switches

Fixed the "Input Dip-Switches" properties dialog. Under certain conditions (in particular under the virtual machine "Wine", on MAC), the buttons used to change the input value at design time were not shown, making it impossible to change the input value. Now the problem has been solved (see the figure below).

 Mouse Wheel

Fixed a bug regarding the mouse wheel functionality. When a dialog was opened (just for example the dialog for defining the contents of a textbox, or the save image dialog), the mouse wheel was still active on the main window, if the mouse was on it. Now the effect of the wheel in all of these cases has been inhibited.

 Toolbars Colors

Fixed a BUG about the colors of the main menu, of the toolbars and of the cosmetic frame around the work area of the Deeds-DcS.

   Deeds-DcS (FPGA support)  

  FSM Renaming

In previous Deeds versions, if a Finite State Machine was named with the same name as the main file, that name was used without changes for VHDL generation. Because of this, the generated VHDL FSM file had been overwritten by the "top level" VHDL file and, at compilation time, the FSM file resulted as missing and an error generated.

Starting from the current version, the MSF file names are renamed and enumerated automatically, adding a postfix to the original name. For example, the file "MyFile.fsm" is converted to a VHDL file with a name like "MyFile_Fsm3.vhd". The string "_Fsm" has been added to the original name, with the addition of a growing number.

 Device Assignment

In the Test On FPGA dialog, the assignment procedure between Deeds and FPGA board components has been improved. A pin-index auto-increment function is now available for the multi-wire components (it is activated by default in the new version). When a multi-wire component is selected, a new button appears over the pin list, that allows to enable / disable the auto-increment feature, as highlighted in the next figure (by the green arrow).

If the auto-increment option is active, each time one defines (or edits) an assignment between a PIN of a component (orange arrow) and an element of the FPGA board (white arrow), the PIN selection is moved to the next one (red arrow).

Using the new feature, it is not necessary to select manually the next PIN, as in previous versions, even if manual selection is still possible. Moreover, the system waits about half a second, before moving the selection to the next PIN, so that the user can see the result of the assignment just made.

 Vertical Position

Fixed a bug of the Test On FPGA dialog. It related to saving and restoring the vertical position of the separation between the upper pane of the associations and the lower pane with the image of the FPGA board (highlighted in the figure below).

The problem arose when assigning an FPGA card to a project to which it had not yet been assigned.

 DMC8/D8080 Core

Fixed a few bugs concerning the VHDL description of the DMC8/D8080 processor core, regarding the interrupt sequence timing and the IX and IY addressing modes.

 Unconnected Pins

Fixed a bug regarding VHDL generation. The bug appeared when, in a CBE, a component output pin was left unconnected, and more than one instances of the CBE were inserted in a circuit. A SIGNAL whose name did not take into account the CBE identifier had been assigned to the unconnected pin. In this way, more SIGNALs with the same name were defined in the source. Now the unconnected signal is named with a string generated in this way:

'ncp'+ <pin number> + '_B'+ <CBE progressive number> +'_C'+ <Component progressive number>

 ROM Naming

Fixed a bug regarding VHDL generation when using ROMs into a CBE. When a CBE (containing ROM components) was used two or more times into the top level circuit, the ROM received the same VHDL name, causing error at compile time. Now the ROM is named including a string composed as follows:

'B'+ <CBE progressive number> +'_C'+ <Component progressive number>

   Deeds-DcS (Simulation)  

  DMC8/D8080 Object Code Window

A new button has been added to the left of the "Instruction Step" button in the microprocessor object code window (see the next figure).

From the user point of view, the new button allows to switch from Step-by-Step to Run mode and vice-versa. This corresponds to disabling or enabling the global clock animation feature using the button already present in the main window toolbars (see figure below).

 DMC8 Enhanced: OE, OF, OG, OH Output Ports

Fixed a bug that caused the malfunctioning of the new output ports OE, OF, OG and OH. Also the functionality of the input ports IE, IF, IG and IH has been corrected. Now all the ports of the "DMC8 – Enhanced" work in a stable way (thanks again to Arkadi Poliakov for the bug report).

 Internal Netlist Generation

Fixed a few bugs in the internal netlist generation and circuit compiling for the simulation. These bugs could cause crashing on starting the simulation, or an erroneous generation of a big number of warning message. Note: the problem could be mistakenly attributed to other causes, for instance to the number of component in use, because it showed typically in large projects, when adding components or CBE blocks to the circuit (thanks to Arkadi Poliakov for the bug report and assistance in testing).

 Flip-flop JK

Fixed a bug regarding the JK PET/NET flip-flops, when not initialized. Now, when their output Q and !Q are still unknown, on the clock active edge the outputs are correctly defined if J and K value are respectively 0 and 1, or 1 and 0 (before, the outputs remained unknown).

   Deeds-DcS (Timing Diagram)   

 DMC8 Sub-tracks

Bug fix. In the Timing Diagram window, the DMC8 sub-tracks had not always correctly displayed. Under certain conditions, they all had displayed erroneously equal to the Clock Out track.


Another bug fix. After opening the Timing Diagram window, if the focus was moved back to the circuit editor in the main window, the short-cuts related to the timing diagram panning and zooming remained active. Now the problem has been solved and the short-cuts of the two windows are completely independent, as expected.


 Font Size Short-cut

Added a new short-cut command to resize rapidly the font currently used in the code editor:

  • Pressing <Control> + '0' restore the font size to the default (9 pt)
  • Pressing <Control> + '+' enlarge the font size of one step
  • Pressing <Control> + '-' reduce the font size of one step

Moreover, the “flicker” of the editor during the font resize has been reduced.

 TAB Position

Corrected a bug regarding the tab position setting, in the code editor. Now the TAB position has correctly re-calculated in function of the current font size.

 Object Code Window Colors

As signaled by Luis Claudio Gamboa Lopes, the colors used for the font in the current instruction shown in the "Object Code" pane did not have enough contrast over the clear background to be seen easily. The problem has been corrected using a black font and different colors as background (see figure below).

 D8080 Flag Register

The i8080 does not have the "N" flag, so this flag is hidden in the debugger's registers panel, when in D8080 mode. Moreover, the i8080 has the "P" flag only, so the "P/V" flag, when in D8080 mode, is shown simply as "P".

Thanks to Luis Claudio Gamboa Lopes for reporting this.

 Line Numbers and Breakpoints

Bug fix. The two columns on the left side (the ones reporting line numbers and breakpoints state) were not read-only and they could be accidentally edited.


Fixed a bug regarding the Breakpoints. When executing a program in "step-by-step" mode, upon reaching a Breakpoint, the system did not report having reached it, as it did it normally happened in "running" or "animating".

Moreover, in the Object Code pane, the context menu item that allows to set/clear a Breakpoint on a specific instruction has been changed. Now it shows the string 'Set Breakpoint at…' or 'Clear Breakpoint at…’ according to the breakpoint setting for that instruction. Previously the string was generically 'Toggle Breakpoint at…'.

This modification applies also to the Deeds-DcS Object Code window.

 Almost Empty Files

Fixed a bug related to deleting the last character remaining in a source file. Previously, after having deleted that character, pressing a second time the DEL key showed an anomalous selection.

 Reset Location

Fixed the display of the error message: "Error: No instruction loaded in the reset location (0000h)". The error had detected and generated correctly, but the Red Arrow pointed to a line beyond the last line of code. Now, in case of this error, the Red Arrow points always to the first line.

 Editor Flicker

Fixed a bug regarding the update of the lines of source code, in the code editor, during editing (under Windows 10). Now, no more "flicker" is visible during the editing.


 Property Window

Under Windows 10, some random difficulty in displaying the Property Window contents was reported. Now the Deeds has been recompiled with the last version of the compiler, just for (and in) Windows 10. This problem seems fixed.

   Deeds-DcS, Deeds-FsM, Deeds-McE   

This version of Deeds had been tested under Windows 10 only. We recommend that you do not install it in previous versions of Windows.